Sandeepani Courses - Learning Path

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Whether you are a student, faculty or corporate professional, if you want to up-skill or re-skill yourself, we have a range of online instructor-led and on-demand programs that will arm you with the required skill and knowledge. The learning maps below provide a comprehensive view of the learning paths for you. They provide recommended course flows to guide you through a complete learning plan.

For working professionals	For academicians	For students
FPGA/SoC/Embedded Hardware FPGA/SoC/Embedded Software System Design HDL/HVL	ASIC Design FPGA Design	Internship Programs (part-time) Professional Courses (full-time)

For working professionals

FPGA/SoC/Embedded Hardware	FPGA/SoC/Embedded Software	System Design	HDL/HVL/ASIC
FPGA Design Flow using Vivado (Self-paced Video course) FPGA architecture - Xilinx 7-series (Self-paced Video course) Static Timing Analysis and CDC (Self-paced Video course) Embedded System Design using Zynq (Self-paced Video course) Designing with the UltraScale and UltraScale+ Architectures Zynq UltraScale+ for the Hardware Designer High-Level Synthesis with the Vitis HLS Tool Designing with the Versal ACAP	Embedded System Design Embedded Systems Software Design DSP Design using System Generator Zynq UltraScale+ for the Software Developer Embedded Design with PetaLinux Tools Migrating to the Vitis Embedded Software Development IDE Accelerating Applications with the Vitis Unified Software Environment Developing AI Inference Solutions with the Vitis AI Platform	UltraFast Design Methodology Designing with Xilinx Serial Transceivers Zynq UltraScale+ for the System Architect	Designing with Verilog (Self-paced Video course) Designing with VHDL (Self-paced Video course) Designing with SystemVerilog (Self-paced Video course) Advanced VHDL (Self-paced Video course) Physical Verification using Calibre (Self-paced Video course)

For academicians

ASIC Design	FPGA Design
Full-custom ASIC Design and Verification Physical Design and Verification RTL to GDSII Design for Testability using Tessent	FPGA Design Flow using Vivado (Self-paced Video course) FPGA architecture - Xilinx 7-series (Self-paced Video course) Embedded System Design using Zynq (Self-paced Video course) High-Level Synthesis with the Vivado HLS Tool

For students

Internship Programs - Part-time	Professional Courses - Full-time
Xilinx SoC Design Flow Full-custom ASIC Design and Verification RTL2GDSII - ASIC Physical Design and Verification Functional Verification using SystemVerilog	Professional Development Course in FPGA based VLSI Design

For On-demand courses, click here

For Internship programs, click here

If you are a faculty member, click here

If you are a corporate professional, click here