Designing with Xilinx Serial Transceivers

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Course Description

Learn how to employ serial transceivers in UltraScale and UltraScale+ FPGA designs or Zynq UltraScale+ MPSoC designs. The focus is on:

• Identifying and using the features of the serial transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock correction, and comma detection
• Utilizing the Transceivers Wizards to instantiate transceiver primitives
• Synthesizing and implementing transceiver designs
• Testing and debugging

This course combines lectures with lab exercises to reinforce the concepts.

Pre-requisites:

• Verilog knowledge
• Basic knowledge of FPGA architecture and Xilinx implementation tools
• Familiarity with serial I/O basics and high-speed serial I/O standards

What do I gain?

• Describe and use the ports and attributes of the serial transceivers in Xilinx FPGAs and MPSoCs
• Effectively use the following features of the gigabit transceivers: 64B/66B and other encoding/decoding, comma detection, clock correction, and channel bonding
• Use the Transceivers Wizards to instantiate GT primitives in a design

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