Physical Verification using Calibre
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Course Description
This self-paced course provides a detailed description of the ASIC Physical Verification process. The program comes with theory lectures, lab demos and hands-on labs on a cloud environment. Some of the key concepts covered are DRC, LVS and Parasitic Extraction.
Pre-requisites:
- Knowledge of Basic VLSI circuits and SPICE
- Basic Layout design concepts
- Knowledge on IC design process
Access:
- Login and password will be shared within 1 business day after payment and registration
- Content will be made available for 1 month from start of access
What do I gain?
- Get an introduction to the IC Design flow
- Understand Physical Verification and how it fits into the chip design flow
- Learn about Design Rule Checks (DRC), Layout vs Schematic (LVS) and Parasitic Extraction (PEX)
- Get a practical insight through lab demonstrations
- Perform hands-on labs on a cloud environment
Download PDF for detailed course content
Need More Info ?
Contact us: 
(For Students)
+91-9844182555(For Corporates)
+91-8754722266
Email us: training@coreel.com
Admission Office:
(080) 4197 0445
Front Office:
(080) 4197 0400