High-Level Synthesis with the Vitis HLS Tool

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Course Description

The course provides a thorough introduction to the Vivado High-Level Synthesis (HLS) tool. This course covers synthesis strategies, features, improving throughput, area, interface creation, latency, testbench coding, and coding tips. It also describes how to utilize the Vivado HLS tool to optimize code for high-speed performance in an embedded environment and download for in-circuit validation.

This course combines lectures with lab exercises to reinforce the concepts.

Pre-requisites:

• Knowledge of C, C++ or System C

Course duration:

• 3 days (9 hours - 3 hours per day)

What do I gain?

• Enhance productivity by using the Vivado HLS tool
• Describe the high-level synthesis flow
• Use the Vivado tool HLS for a first project
• Identify the importance of the testbench
• Use directives to improve performance and area and select RTL interfaces
• Identify common coding pitfalls as well as methods for improving code for RTL/hardware
• Perform system-level integration of IP generated by the Vivado HLS tool
• Describe how to use OpenCV functions in the Vivado HLS tool

Download PDF for course content and registration process

Register for 21 Jun 2021 Online batch REGISTER
Register for future batch REGISTER