Back to: Designing with VHDL
This self-paced course provides a thorough introduction to the VHDL language. The program comes with insightful theory lectures, lab code and lab demos. The emphasis is on employing structural, register transfer level (RTL), and behavioral coding styles in VHDL.
Pre-requisites:
- Knowledge of digital circuits
General Instructions
Welcome to the Designing with VHDL course. This course is divided into 6 chapters:
1 – The Shape of VHDL
2 – Operators and Data Flow Modeling
3 – Structural Modeling
4 – Behavioral Modeling
5 – Testbenches in VHDL
6 – Modeling FSM
Each chapter has theory and lab videos. Where applicable, lab files are made available chapter-wise.
Recommended software for this course:
- Mentor Graphics QuestaSim or ModelSim
- Xilinx Vivado
The course contents will be available for 1 month from start of access.
For assistance while taking up the course, email training@coreel.com