Embedded System Design using Zynq

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This self-paced online course gives participants an in-depth view of the Embedded System Design flow using Xilinx tools and technologies. It covers the Zynq-7000 architecture, PS-PL interface, using the IP Integrator in Vivado and Software flow and Debugging using Vitis. The program comes with insightful theory lectures, lab code and lab demos.

Course Information

Difficulty: Intermediate

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Embedded System Design using Zynq

₹6,999.00
1 month of access
 
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General Instructions

Introduction

Introduction to Embedded System Design

Introduction to Embedded System Design

Xilinx SoC Design Flow

Overview of Embedded Hardware Development
Overview of Embedded Software Development
Driving the Vitis Software Development Tool
Lab: Simple Hardware Design

Zynq Architecture

Application Processor Unit (APU)
Input/Output Peripherals
Lab: PS-UART

PS-PL Interface

PS-PL Interface
AXI-Introduction
AXI-Variations
AXI-Trasactions
Lab 3 code
Lab 3: Adding Peripherals in Programmable Logic

IP Integrator and Packager

Designing with IP integrator
Creating a custom IP
Lab 4 code
Lab 4: Creating and adding your own custom IP (AXI IP)

Debugging the Zynq SoC

Debugging the Zynq SoC
Lab 5 code
Lab 5: Working with Timers and Debugging Applications using Vitis

Introduction to MPSoC and RFSoC architectures

Introduction to MPSoC and RFSoC architectures